ECE 371 Homework 4 Due 11:59 P.m. Tuesday

1ece 371 Homework 4 Due 1159 Pm Tues 7814

What is meant by an "exception" on a microcomputer/microcontroller, and what are the two kinds of exceptions? List and briefly describe the 4 kinds of events that can cause the MC9S12DP256B microcontroller to be reset. When a reset is initiated, how does the microcontroller respond? What is the primary difference in the way the microcontroller responds to a reset and the way it responds to an interrupt? What flag in the Condition Code Register (CCR) affects the maskable interrupts? How can that flag be controlled by C code? If an interrupt request is applied to the IRQ pin on the microcontroller, what two conditions must be present in order for an interrupt to be granted? Below is a list of steps that the 256B microcontroller performs when an interrupt request on the IRQ pin is accepted. Put numbers to the left side of these steps to show the order in which they are performed: calculate return address and save on stack, along with values in key registers; start executing instructions in the interrupt service routine; finish current instruction; set “I” bit in Condition Code Register (CCR) to 1, to disable other maskable interrupt requests; set “X” bit in CCR to 1, to temporarily disable XIRQ non-maskable interrupt requests; obtain starting address of interrupt service routine from the interrupt vector table; clear instruction queue. From what address(es) in the interrupt vector table does the microcontroller obtain the starting address of the service routine for interrupt requests applied to the IRQ pin? From what address(es) in the interrupt vector table does the microcontroller obtain the starting address of the service routine for interrupt requests applied to the XIRQ pin?

Paper For Above instruction

Understanding exceptions in microcontrollers is essential for designing reliable embedded systems. An "exception" refers to an event that alters the normal flow of program execution, prompting the microcontroller to respond to unexpected conditions or specific hardware signals. The two primary kinds of exceptions are faults and interrupts. Faults are conditions automatically detected by the hardware, such as illegal operations or memory access violations, requiring immediate attention. Interrupts are external or internal signals that request the processor's attention for predefined service routines, often used for handling peripheral devices or timing events.

The MC9S12DP256B microcontroller can be reset by several events, totaling four significant causes: power-on reset, external reset, watchdog reset, and software reset. A power-on reset occurs when power is first supplied to the device, initializing the system. External reset is triggered by an external signal, usually via a reset pin. The watchdog reset is caused by the watchdog timer, which resets the system if it detects a software fault or hangs. Software reset can be initiated programmatically by software instructions. When a reset occurs, the microcontroller responds by initializing all system registers and setting program flow to the reset vector address, which is typically at a fixed start location in memory. This behavior contrasts with an interrupt, where the system saves the current context, vectors to a specific service routine, and then returns to the prior execution flow after servicing.

In terms of handling maskable interrupts, the CCR (Condition Code Register) contains a flag called the I bit. This bit determines whether maskable interrupts are enabled or disabled. In C, this flag can be controlled using specific instructions or inline assembler routines that manipulate the CCR, enabling or disabling maskable interrupt requests as needed. For example, setting the I bit to 1 disables maskable interrupts, which is useful during critical sections to prevent interruptions, while clearing it enables them to allow the system to respond to interrupt requests.

When an interrupt request is applied to the IRQ pin, two conditions must be met for the microcontroller to grant the interrupt. First, the maskable interrupt enable flag (I bit in CCR) must be cleared (set to 0), indicating that maskable interrupts are enabled. Second, the individual interrupt enable bit for the IRQ source must also be enabled in the interrupt control register. Only if both conditions are satisfied does the system proceed to service the interrupt.

Upon acceptance of an IRQ interrupt, the microcontroller executes a specific sequence of steps: it finishes the current instruction, calculates the return address, and pushes this address onto the stack along with key register values. It then retrieves the starting address of the interrupt service routine (ISR) from the interrupt vector table, which maps interrupt sources to their respective routine addresses. During this process, it sets the I bit in CCR to 1, temporarily disabling further maskable interrupts, and sets the X bit to 1 to disable non-maskable XIRQ requests temporarily. This ensures that while servicing one interrupt, no other lower-priority interrupts can preempt the current routine. Once the ISR completes, the microcontroller restores the previous state from the stack and resumes normal operation.

The address from which the microcontroller obtains the starting address of an IRQ service routine is specified in the vector table at a fixed address for each interrupt source. Specifically, the vector table contains the address of the ISR for IRQ at a predefined location, typically at a known memory address such as 0xFFFE–0xFFFF, depending on the memory map and device configuration. Similarly, for the XIRQ interrupt, the starting address is stored at its respective vector table location, often at 0xFFFA–0xFFFB, according to the device's documentation. These addresses point the microcontroller to the specific routines that handle these interrupts, allowing prompt and organized responses to hardware events.

References

• Freeman, S. (2005). Microcontroller Architecture, Programming, and Interfacing. Morgan Kaufmann.
• Microcontrollers and Embedded Systems: The MC9S12 DP Family Users Guide. (2012). Freescale Semiconductor.
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